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[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.5.0rc1/] [doc/] [or1ksim.info] - Rev 224

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224 Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. jeremybennett 5114d 14h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/or1ksim.info
220 Updated library interface to take a full command line (this will break all old code). Added -q/--quiet and --report-memory-errors flags to command line. Fixed all tests to match this. jeremybennett 5121d 06h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/or1ksim.info
202 Adding executed log in binary format capability to or1ksim julius 5127d 10h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/or1ksim.info
143 Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix breakpoints with instruction cache enabled (Bug 195). jeremybennett 5144d 10h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/or1ksim.info
134 Updates for stable release 0.4.0 jeremybennett 5152d 14h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/or1ksim.info
127 New config option to allow l.xori with unsigned operand. jeremybennett 5158d 11h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/or1ksim.info
124 Overflow handling now in line with architecture manual. Tests added. jeremybennett 5159d 06h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/or1ksim.info
123 Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. jeremybennett 5159d 10h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/or1ksim.info
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5160d 07h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/or1ksim.info
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5161d 04h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/or1ksim.info
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5163d 07h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/or1ksim.info
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5165d 07h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/or1ksim.info
110 or1ksim make check should work without a libc in the or32-elf tools julius 5166d 08h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/or1ksim.info
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5168d 07h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/or1ksim.info
104 Candidate release 0.4.0rc4 jeremybennett 5171d 15h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/or1ksim.info
100 Single precision FPU stuff for or1ksim julius 5180d 11h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/or1ksim.info
99 Bug in test evaluation for library fixed. jeremybennett 5185d 09h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/or1ksim.info
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5186d 10h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/or1ksim.info
96 Various changes which had not been picked up in earlier commits. jeremybennett 5201d 17h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/or1ksim.info
93 Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0. jeremybennett 5207d 08h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc/or1ksim.info

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