OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.5.0rc1/] [doc] - Rev 118

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5145d 21h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5148d 00h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5150d 00h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc
110 or1ksim make check should work without a libc in the or32-elf tools julius 5151d 01h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5153d 00h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc
104 Candidate release 0.4.0rc4 jeremybennett 5156d 08h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5165d 02h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc
100 Single precision FPU stuff for or1ksim julius 5165d 04h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc
99 Bug in test evaluation for library fixed. jeremybennett 5170d 02h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5171d 03h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5185d 09h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc
96 Various changes which had not been picked up in earlier commits. jeremybennett 5186d 10h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc
93 Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0. jeremybennett 5192d 01h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc
91 Tidy up of some obsolete configuration code. jeremybennett 5198d 23h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc
90 Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain). jeremybennett 5199d 00h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc
85 Bug 1773 (RSP usage with ELF image preloaded) fixed. jeremybennett 5199d 09h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.
jeremybennett 5200d 00h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc
80 Add missing configuration files to SVN. jeremybennett 5200d 03h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5530d 09h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/doc

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.