URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.5.0rc1/] [peripheral/] [mc.c] - Rev 403

Rev	Log message	Author	Age	Path
347	Tagging the 0.5.0rc1 candidate release of Or1ksim.	jeremybennett	5037d 21h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc1/peripheral/mc.c
224	Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg.	jeremybennett	5076d 22h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc1/peripheral/mc.c
104	Candidate release 0.4.0rc4	jeremybennett	5133d 23h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc1/peripheral/mc.c
98	Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller.	jeremybennett	5148d 18h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc1/peripheral/mc.c
82	Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check". Incorporate Mark Jarvis's fixes for Mac OS X.	jeremybennett	5177d 15h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc1/peripheral/mc.c
19	Initial commit of Or1ksim 0.3.0 into the new repository	jeremybennett	5508d 00h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc1/peripheral/mc.c