OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.5.0rc3/] [pic/] [pic.c] - Rev 509

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
509 Tagging the 0.5.0rc3 release of Or1ksim jeremybennett 4870d 08h /openrisc/tags/or1ksim/or1ksim-0.5.0rc3/pic/pic.c
440 Updated documentation to describe new Ethernet usage. jeremybennett 4990d 23h /openrisc/tags/or1ksim/or1ksim-0.5.0rc3/pic/pic.c
436 Or1ksim ethernet TAP updates. Ethernet test still failing. julius 4999d 18h /openrisc/tags/or1ksim/or1ksim-0.5.0rc3/pic/pic.c
432 Updates to handle interrupts correctly. jeremybennett 5004d 03h /openrisc/tags/or1ksim/or1ksim-0.5.0rc3/pic/pic.c
430 or1ksim - clarifying interrupt behavior in code and documentation. julius 5007d 00h /openrisc/tags/or1ksim/or1ksim-0.5.0rc3/pic/pic.c
224 Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. jeremybennett 5122d 08h /openrisc/tags/or1ksim/or1ksim-0.5.0rc3/pic/pic.c
220 Updated library interface to take a full command line (this will break all old code). Added -q/--quiet and --report-memory-errors flags to command line. Fixed all tests to match this. jeremybennett 5128d 23h /openrisc/tags/or1ksim/or1ksim-0.5.0rc3/pic/pic.c
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5553d 09h /openrisc/tags/or1ksim/or1ksim-0.5.0rc3/pic/pic.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.