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[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.5.1rc1/] [configure] - Rev 143

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143 Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix breakpoints with instruction cache enabled (Bug 195). jeremybennett 5113d 23h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/configure
134 Updates for stable release 0.4.0 jeremybennett 5122d 02h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/configure
127 New config option to allow l.xori with unsigned operand. jeremybennett 5127d 23h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/configure
124 Overflow handling now in line with architecture manual. Tests added. jeremybennett 5128d 19h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/configure
123 Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. jeremybennett 5128d 23h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/configure
122 Added l.ror and l.rori with associated tests. jeremybennett 5129d 19h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/configure
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5129d 19h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/configure
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5130d 16h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/configure
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5132d 19h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/configure
115 Added support for l.fl1 and tests for l.ff1 and l.fl1 jeremybennett 5133d 19h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/configure
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5134d 19h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/configure
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5137d 20h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/configure
104 Candidate release 0.4.0rc4 jeremybennett 5141d 03h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/configure
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5149d 21h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/configure
99 Bug in test evaluation for library fixed. jeremybennett 5154d 21h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/configure
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5155d 22h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/configure
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5170d 04h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/configure
96 Various changes which had not been picked up in earlier commits. jeremybennett 5171d 05h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/configure
93 Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0. jeremybennett 5176d 20h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/configure
91 Tidy up of some obsolete configuration code. jeremybennett 5183d 19h /openrisc/tags/or1ksim/or1ksim-0.5.1rc1/configure

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