URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.5.1rc1/] [pic/] [pic.c] - Rev 840

Rev	Log message	Author	Age	Path
511	Tagging the 0.5.1rc1 release of Or1ksim	jeremybennett	4847d 22h	/openrisc/tags/or1ksim/or1ksim-0.5.1rc1/pic/pic.c
440	Updated documentation to describe new Ethernet usage.	jeremybennett	4968d 13h	/openrisc/tags/or1ksim/or1ksim-0.5.1rc1/pic/pic.c
436	Or1ksim ethernet TAP updates. Ethernet test still failing.	julius	4977d 08h	/openrisc/tags/or1ksim/or1ksim-0.5.1rc1/pic/pic.c
432	Updates to handle interrupts correctly.	jeremybennett	4981d 17h	/openrisc/tags/or1ksim/or1ksim-0.5.1rc1/pic/pic.c
430	or1ksim - clarifying interrupt behavior in code and documentation.	julius	4984d 14h	/openrisc/tags/or1ksim/or1ksim-0.5.1rc1/pic/pic.c
224	Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg.	jeremybennett	5099d 22h	/openrisc/tags/or1ksim/or1ksim-0.5.1rc1/pic/pic.c
220	Updated library interface to take a full command line (this will break all old code). Added -q/--quiet and --report-memory-errors flags to command line. Fixed all tests to match this.	jeremybennett	5106d 13h	/openrisc/tags/or1ksim/or1ksim-0.5.1rc1/pic/pic.c
19	Initial commit of Or1ksim 0.3.0 into the new repository	jeremybennett	5531d 00h	/openrisc/tags/or1ksim/or1ksim-0.5.1rc1/pic/pic.c