URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [boards/] [or32-linux-sim.exp] - Rev 524

Rev	Log message	Author	Age	Path
524	Various tidy ups to GDB and updates to the simulation boards for the latest GCC.	jeremybennett	4824d 19h	/openrisc/trunk/gnu-src/boards/or32-linux-sim.exp
522	Miscellaneous tidy ups.	jeremybennett	4827d 02h	/openrisc/trunk/gnu-src/boards/or32-linux-sim.exp
490	Updates to fix spurious test failures and register scheduling.	jeremybennett	4882d 17h	/openrisc/trunk/gnu-src/boards/or32-linux-sim.exp
473	Fix typos in tool chain build script. Add build script for BusyBox/uClibc/Linux. Delete obsolete scripts, improve board description for test, add -pthread flag to GCC for Linux.	jeremybennett	4917d 02h	/openrisc/trunk/gnu-src/boards/or32-linux-sim.exp
453	Updates to support constructor/destructor initialization for uClibc.	jeremybennett	4941d 12h	/openrisc/trunk/gnu-src/boards/or32-linux-sim.exp