URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [config/] [or32/] [or32.h] - Rev 399

Rev	Log message	Author	Age	Path
399	Updates to the linker, GCC, newlib and GDB in preparation for supporting C++. The key changes are that the linker now uses RELA and that GCC may save registers at the bottom of the stack before the frame is allocated or after it is deallocated, so exception handlers/thread primitives should not use the first 130 bytes after the SP.	jeremybennett	4993d 04h	/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32.h
333	Fix the default option (to use -mhard-mul). Update the documentation for OpenRISC.	jeremybennett	5049d 23h	/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32.h
332	Provide support for nested functions. Tidy up board specification. * config/or32/or32-protos.c <or32_trampoline_code_size>: Added. * config/or32/or32.c <OR32_MOVHI, OR32_ORI, OR32_LWZ, OR32_JR>: New macros added. (or32_emit_mode, or32_emit_binary, or32_force_binary) (or32_trampoline_code_size, or32_trampoline_init): Created. (or32_output_bf): Tabbing fixed. <TARGET_TRAMPOLINE_INIT>: Definition added. * config/or32/or32.h <STATIC_CHAIN_REGNUM>: Uses R11. <TRAMPOLINE_SIZE>: redefined. <TRAMPOLINE_ENVIRONMENT>: Added definition.	jeremybennett	5050d 22h	/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32.h
282	Baseline GCC 4.5.1 port for the OpenRISC 1000	jeremybennett	5052d 01h	/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32.h