OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [config/] [or32/] [or32.md] - Rev 522

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
522 Miscellaneous tidy ups. jeremybennett 4900d 12h /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32.md
518 Missing parts of checkin from revision 515. Version now 1.0rc4. julius 4903d 06h /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32.md
490 Updates to fix spurious test failures and register scheduling. jeremybennett 4956d 03h /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32.md
414 Updates to add -mredzone and improved GCC optimizations. jeremybennett 5057d 02h /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32.md
399 Updates to the linker, GCC, newlib and GDB in preparation for supporting C++. The key changes are that the linker now uses RELA and that GCC may save registers at the bottom of the stack before the frame is allocated or after it is deallocated, so exception handlers/thread primitives should not use the first 130 bytes after the SP. jeremybennett 5063d 10h /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32.md
282 Baseline GCC 4.5.1 port for the OpenRISC 1000 jeremybennett 5122d 07h /openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32.md

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.