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[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_top.v] - Rev 841

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813 or1200: Set correct PC after reset when parameter boot_adr is used

Signed-off-by: Olof Kindgren <olof@opencores.org>
Acked-by: Julius Baxter <juliusbaxter@gmail.com>		 olof 4312d 03h /openrisc/trunk/or1200/rtl/verilog/or1200_top.v
679 Allow setting the boot address as an external
parameter. If no parameter is used, the value
from OR1200_BOOT_ADR will be used

Signed-off-by: Olof Kindgren <olof@opencores.org>
Acked-by: Julius Baxter <juliusbaxter@gmail.com>		 olof 4515d 02h /openrisc/trunk/or1200/rtl/verilog/or1200_top.v
481 OR1200 Update. RTL and spec. julius 4921d 17h /openrisc/trunk/or1200/rtl/verilog/or1200_top.v
364 OR1200 passes verilator lint. Mainly fixes to widths, and all case statements
altered to casez and Xs changed to ?s.

OR1200 PIC default width back to 31 (was accidentally changed to ORPSoC's 20
last checkin)

OR1200 spec updated to version 0.9, various updates.

OR1200 in ORPSoC and main OR1200 in sync, only difference is defines.		 julius 5050d 02h /openrisc/trunk/or1200/rtl/verilog/or1200_top.v
258 Big OR1200 update - FPU, data cache write-back added, spec updated, ODT format doc now main one, default config set to both caches 8K, all integer arithmetic, FPU off julius 5062d 20h /openrisc/trunk/or1200/rtl/verilog/or1200_top.v
185 Adding single precision FPU to or1200, initial checkin, not fully tested yet julius 5113d 04h /openrisc/trunk/or1200/rtl/verilog/or1200_top.v
142 added OpenRISC version rel3 marcus.erlandsson 5124d 08h /openrisc/trunk/or1200/rtl/verilog/or1200_top.v
10 or1200 added from or1k subversion repository unneback 5525d 12h /openrisc/trunk/or1200/rtl/verilog/or1200_top.v

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