OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [autom4te.cache/] [traces.1] - Rev 753

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
552 or1ksim - cpu/ cleanup - remove dynamic execution model WIP, and dlx, or16 targets julius 4913d 04h /openrisc/trunk/or1ksim/autom4te.cache/traces.1
428 or1ksim - adding preliminary PHY emulation to ethernet peripheral. julius 5110d 19h /openrisc/trunk/or1ksim/autom4te.cache/traces.1
233 New softfloat FPU and testfloat sw for or1ksim julius 5219d 15h /openrisc/trunk/or1ksim/autom4te.cache/traces.1
226 Orksim floating point support additions, spr-defs.h updates, newlib cache init routines updated julius 5222d 20h /openrisc/trunk/or1ksim/autom4te.cache/traces.1
60 Mark Jarvin's patches to support Mac OS X (Snow Leopard). jeremybennett 5441d 23h /openrisc/trunk/or1ksim/autom4te.cache/traces.1
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5654d 05h /openrisc/trunk/or1ksim/autom4te.cache/traces.1

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.