OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [configure] - Rev 123

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
123 Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. jeremybennett 5255d 12h /openrisc/trunk/or1ksim/configure
122 Added l.ror and l.rori with associated tests. jeremybennett 5256d 08h /openrisc/trunk/or1ksim/configure
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5256d 08h /openrisc/trunk/or1ksim/configure
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5257d 05h /openrisc/trunk/or1ksim/configure
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5259d 08h /openrisc/trunk/or1ksim/configure
115 Added support for l.fl1 and tests for l.ff1 and l.fl1 jeremybennett 5260d 08h /openrisc/trunk/or1ksim/configure
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5261d 08h /openrisc/trunk/or1ksim/configure
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5264d 09h /openrisc/trunk/or1ksim/configure
104 Candidate release 0.4.0rc4 jeremybennett 5267d 16h /openrisc/trunk/or1ksim/configure
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5276d 10h /openrisc/trunk/or1ksim/configure
99 Bug in test evaluation for library fixed. jeremybennett 5281d 10h /openrisc/trunk/or1ksim/configure
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5282d 11h /openrisc/trunk/or1ksim/configure
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5296d 17h /openrisc/trunk/or1ksim/configure
96 Various changes which had not been picked up in earlier commits. jeremybennett 5297d 19h /openrisc/trunk/or1ksim/configure
93 Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0. jeremybennett 5303d 09h /openrisc/trunk/or1ksim/configure
91 Tidy up of some obsolete configuration code. jeremybennett 5310d 08h /openrisc/trunk/or1ksim/configure
90 Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain). jeremybennett 5310d 09h /openrisc/trunk/or1ksim/configure
89 Tidy up for latest bug fixes. jeremybennett 5310d 16h /openrisc/trunk/or1ksim/configure
85 Bug 1773 (RSP usage with ELF image preloaded) fixed. jeremybennett 5310d 17h /openrisc/trunk/or1ksim/configure
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.		 jeremybennett 5311d 08h /openrisc/trunk/or1ksim/configure

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.