URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [cpu/] [or32/] [insnset.c] - Rev 112

Rev	Log message	Author	Age	Path
112	Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register.	jeremybennett	5130d 06h	/openrisc/trunk/or1ksim/cpu/or32/insnset.c
107	New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug.	jeremybennett	5133d 07h	/openrisc/trunk/or1ksim/cpu/or32/insnset.c
104	Candidate release 0.4.0rc4	jeremybennett	5136d 14h	/openrisc/trunk/or1ksim/cpu/or32/insnset.c
100	Single precision FPU stuff for or1ksim	julius	5145d 10h	/openrisc/trunk/or1ksim/cpu/or32/insnset.c
82	Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check". Incorporate Mark Jarvis's fixes for Mac OS X.	jeremybennett	5180d 06h	/openrisc/trunk/or1ksim/cpu/or32/insnset.c
19	Initial commit of Or1ksim 0.3.0 into the new repository	jeremybennett	5510d 15h	/openrisc/trunk/or1ksim/cpu/or32/insnset.c