OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [configure] - Rev 104

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
104 Candidate release 0.4.0rc4 jeremybennett 5119d 00h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5127d 18h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5133d 19h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5148d 01h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure
95 Some tidy ups to the DejaGNU testing.

All Mark Jarvin's fixes for Mac OS X.
jeremybennett 5150d 19h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure
93 Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0. jeremybennett 5154d 17h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure
90 Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain). jeremybennett 5161d 17h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/configure

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.