OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [test-code-or1k/] [mc-dram] - Rev 118

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5148d 03h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-dram
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5152d 06h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-dram
110 or1ksim make check should work without a libc in the or32-elf tools julius 5153d 07h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-dram
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5167d 08h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-dram
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5173d 09h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-dram
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5187d 15h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-dram
95 Some tidy ups to the DejaGNU testing.

All Mark Jarvin's fixes for Mac OS X.		 jeremybennett 5190d 09h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-dram
90 Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain). jeremybennett 5201d 07h /openrisc/trunk/or1ksim/testsuite/test-code-or1k/mc-dram

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.