URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [bench/] [sysc/] [src/] [OrpsocAccess.cpp] - Rev 51

Rev	Log message	Author	Age	Path
51	ORPSoCv2 updates: cycle accurate profiling, ELF loading	julius	5402d 19h	/openrisc/trunk/orpsocv2/bench/sysc/src/OrpsocAccess.cpp
49	Lots of ORPSoC Updates. Cycle accurate model update. Enabled block read from CPU via debug interface. SMII interface same as devboard but may be broken in sim now. Makefile update	julius	5421d 13h	/openrisc/trunk/orpsocv2/bench/sysc/src/OrpsocAccess.cpp
44	New SystemC model monitoring functions, ethernet PHY model and test sw, smii decoder for ethernet PHY, various makefile upgrades	julius	5473d 00h	/openrisc/trunk/orpsocv2/bench/sysc/src/OrpsocAccess.cpp
6	Checking in ORPSoCv2	julius	5535d 12h	/openrisc/trunk/orpsocv2/bench/sysc/src/OrpsocAccess.cpp