OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [rtl/] [verilog/] [include/] [dbg_wb_defines.v] - Rev 485

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
412 ORPSoC update - Rearranged Xilinx ML501, simulations working again. julius 5122d 04h /openrisc/trunk/orpsocv2/boards/xilinx/ml501/rtl/verilog/include/dbg_wb_defines.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.