OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [arbiter/] [arbiter_ibus.v] - Rev 854

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
363 ORPSoC's RTL code fixed to pass linting by Verilator.

ORPSoC's debug interface disabled for now in both RTL and System C top level.

Profiled building of cycle-accurate model now done correctly.
julius 5177d 03h /openrisc/trunk/orpsocv2/rtl/verilog/arbiter/arbiter_ibus.v
361 OPRSoCv2 - adding things left out in last check-in julius 5178d 17h /openrisc/trunk/orpsocv2/rtl/verilog/arbiter/arbiter_ibus.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.