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[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [or1200/] [or1200_dpram.v] - Rev 483

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Rev Log message Author Age Path
483 ORPSoC OR1200 update. Adding parity testbench and generic fault tolerance testing build. julius 4884d 23h /openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_dpram.v
482 ORPSoC updates - adding parity checking RTL, ethernet MAC FIFO buffer updates. Software changes. julius 4889d 17h /openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_dpram.v
462 ORPSoC SystemC wrapper updates, monitor output more similar to or1ksim.

RAM models updated.
julius 4901d 17h /openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_dpram.v
360 First checkin of new ORPSoC set up - more to come, all but RTL tests temporarily broken julius 5020d 06h /openrisc/trunk/orpsocv2/rtl/verilog/or1200/or1200_dpram.v
350 Adding new OR1200 processor to ORPSoCv2 julius 5023d 10h /openrisc/trunk/orpsocv2/rtl/verilog/components/or1200/or1200_dpram.v

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