OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [drivers/] [or1200/] [or1200-utils.c] - Rev 470

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
411 Improved ethmac testbench and software.

Renamed some OR1200 library functions to be more generic.

Fixed bug with versatile_mem_ctrl for Actel board.

Added ability to simulate gatelevel modules alongside RTL modules
in board build.
julius 5033d 01h /openrisc/trunk/orpsocv2/sw/drivers/or1200/or1200-utils.c
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 5034d 13h /openrisc/trunk/orpsocv2/sw/drivers/or1200/or1200-utils.c
393 ORPSoCv2 software rearrangement in progress. Basic tests should now run again. julius 5041d 00h /openrisc/trunk/orpsocv2/sw/drivers/or1200/or1200-utils.c
349 ORPSoCv2 update with new software and makefile update julius 5091d 01h /or1200-utils.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.