OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [OpenRISC_SIM_GCC] - Rev 799

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
799 FreeRTOSV6.1.1
add cache related function from u-boot from OpenRISC
enable I/D cache if present
filepang 4435d 10h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC
675 FreeRTOSV6.1.1
Source cleanup
Add redzone beyond the stack pointer
filepang 4542d 13h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC
668 FreeRTOSV6.1.1
add missing 'make clean' in make script
filepang 4586d 13h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC
666 FreeRTOSV6.1.1
minimal set of standard demo task is working
filepang 4588d 21h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC
649 porting some of standard demo tasks

fix serial port(UART) interrupt handler
filepang 4663d 21h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC
637 porint parallel port(gpio) management task filepang 4690d 22h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC
636 porting serial port management task, interrupt hander filepang 4690d 22h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC
623 cleanup source code
Demo/OpenRISC_SIM_GCC/arch/support.h
Demo/OpenRISC_SIM_GCC/arch/interrupts.h
Demo/OpenRISC_SIM_GCC/arch/link.ld

add gpio driver

add gpio base address definition
filepang 4703d 20h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC
622 update uart driver for support multiple uart cores
from http://opencores.org/ocsvn/openrisc/openrisc/trunk/orpsocv2/sw/drivers/uart
filepang 4703d 23h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC
621 update sim.cfg for newer version of Or1ksim.
remove unused files.
cleanup source code.

insert non-local jump(setjmp) in xPortStartScheduler. now xPortStartScheduler() will
be returned by xPortEndScheduler().
filepang 4705d 14h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC
620 remove unused file
cleanup makefile
update uart_init(), disable interrupt before initialize.
jeremybennett 4706d 03h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC
584 Initial port of FreeRTOS by filepang (Kim Sung Su). jeremybennett 4720d 01h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.