OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk] - Rev 422

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
422 Separates out --force actions, so only build dirs corresponding to targets being built are blown away. jeremybennett 4974d 10h /openrisc/trunk
421 Fixing some typos in bld-all.sh's --help printout and changed all
"cd .." lines to "cd -".		 julius 4977d 07h /openrisc/trunk
420 New feature to trace instructions (option --trace). Manual updated to match. jeremybennett 4979d 06h /openrisc/trunk
419 ORPmon: Fixed interrupt routines in reset.S so they are compatible with new
GCC port (skip over redzone).
Added some defines to easily switch what is done when an error vector
is executed.
Added ability to print out EPCR when crashing.
Changed linker script back to one which doesn't skip over holes in SPI
flash memories.		 julius 4979d 08h /openrisc/trunk
418 Or1ksim - adding new option when configuring memories, "exitnops" julius 4979d 08h /openrisc/trunk
417 ORPSoC re-adding doc automake files, this time not symlinks julius 4982d 05h /openrisc/trunk
416 ORPSoC doc cleanup - removing symlinks from automake'd docs build path julius 4982d 05h /openrisc/trunk
415 ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash.		 julius 4982d 05h /openrisc/trunk
414 Updates to add -mredzone and improved GCC optimizations. jeremybennett 4983d 01h /openrisc/trunk
413 Fixed to combined bug in the assembler and linker. jeremybennett 4984d 03h /openrisc/trunk
412 ORPSoC update - Rearranged Xilinx ML501, simulations working again. julius 4985d 19h /openrisc/trunk
411 Improved ethmac testbench and software.

Renamed some OR1200 library functions to be more generic.

Fixed bug with versatile_mem_ctrl for Actel board.

Added ability to simulate gatelevel modules alongside RTL modules
in board build.		 julius 4986d 07h /openrisc/trunk
410 ORPSoC: Adding README in root explaining how to build documentation, and
documentation fixup so it builds properly again.		 julius 4987d 07h /openrisc/trunk
409 ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation.		 julius 4987d 07h /openrisc/trunk
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 4987d 19h /openrisc/trunk
407 Update or1ksim version in toolchain script to rc2 julius 4987d 22h /openrisc/trunk
406 ORPmon indented files, bus, align and instruction errors vectors printf and reboot julius 4987d 23h /openrisc/trunk
405 ORPmon updates - ethernet driver updates julius 4988d 03h /openrisc/trunk
404 New scripts to build separate bare metal and Linux tool chains. Fixes to GDB so it builds with the Linux tool chain and uses RELA. Other minor fixes to the GCC tool chain. jeremybennett 4988d 03h /openrisc/trunk
403 ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly. julius 4989d 01h /openrisc/trunk

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.