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[/] [openrisc/] [trunk] - Rev 808

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808 OR1200: Add DSX bit support to SR.

Updated documentation, revision is now 13.

http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=85		 julius 4428d 15h /openrisc/trunk
807 ORPSoC: Commit for bug 85 - add DSX support to OR1200.

http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=85

Also added software tests, and added these tests to default regression test list		 julius 4428d 15h /openrisc/trunk
806 OR1200: Fix for bug 90

http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=90		 julius 4428d 15h /openrisc/trunk
805 ORPSoC: Fix for bug 90 - EPCR on range exception bug

http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=90		 julius 4428d 15h /openrisc/trunk
804 OR1200: Fix for bug 91

http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=91		 julius 4428d 16h /openrisc/trunk
803 ORPSoC: Fix for bug 91, l.sub not setting overflow flag correctly

http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=91		 julius 4428d 16h /openrisc/trunk
802 OR1200: Fix for bug 88

http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=88		 julius 4433d 21h /openrisc/trunk
801 ORPSoC: Fix bug 88

http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=88		 julius 4433d 21h /openrisc/trunk
800 FreeRTOSV6.1.1
add or32_dma demo task for test dcache manuplation function
add simple driver of wb_dma		 filepang 4446d 12h /openrisc/trunk
799 FreeRTOSV6.1.1
add cache related function from u-boot from OpenRISC
enable I/D cache if present		 filepang 4447d 13h /openrisc/trunk
798 Added drivers for ethmac and sdcard_mass_storage_controller skrzyp 4449d 22h /openrisc/trunk
797 testsuite: kill test processes that timeout pgavin 4458d 02h /openrisc/trunk
796 Correct orpmon show_rx_buffs and show_mac_regs to use TX_BD_NUM properly. yannv 4461d 05h /openrisc/trunk
794 ORPSoC, or1200: split out or1200_fpu_intfloat_conv_except module into own file

Fixes lint warnings.		 julius 4467d 06h /openrisc/trunk
793 Corrected Julius Baxter's email address in MAINTAINERS jeremybennett 4478d 05h /openrisc/trunk
792 Added a MAINTAINERS file.

012-04-07 Jeremy Bennett <jeremy.bennett@embecosm.com>

* MAINTAINERS: Added.
* configure: Regenerated.
* configure.ac: Updated version.		 jeremybennett 4478d 05h /openrisc/trunk
791 Added options to configure RAM and ROM sizes. Fixed cache handling. skrzyp 4481d 00h /openrisc/trunk
790 fixed issues with context switching, interrupts, optimizations and cleanups skrzyp 4488d 00h /openrisc/trunk
789 ORPSoC: Patch from R Diez to make RTL sim report l.nops have equivalent formatting to those from or1ksim

Signed-off-by: R Diez <rdiezmail-openrisc@yahoo.de>
Acked-by: Julius Baxter <juliusbaxter@gmail.com>		 julius 4491d 20h /openrisc/trunk
788 or1200: Patch from R Diez to remove l.cust5 signal from a sensitivty list when it's not defined.

Signed-off-by: R Diez <rdiezmail-openrisc@yahoo.de>
Acked-by: Julius Baxter <juliusbaxter@gmail.com>		 julius 4491d 20h /openrisc/trunk

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