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502 ORPSoC update - or1200, ethmac Xilinx fifos
or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default
julius 4962d 14h /openrisc
501 ORPSoC or1200 mult/mac/divide unit serial arith bug fixed.
ORPSoC or1200 defines now use serial divide by default
julius 4963d 14h /openrisc
500 ORPSoC's System C UART model can now accept input from stdin during simulation to drive consoles etc

ML501 simulation makefile update to allow custom ELFs to be specified
julius 4963d 17h /openrisc
499 ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup julius 4964d 10h /openrisc
498 or_debug_proxy updates to documentation and Makefile related to latest ftd2xx driver, julius 4965d 23h /openrisc
497 or_debug_proxy updates julius 4966d 19h /openrisc
496 ORPSoC ml501 updates - increased frequency, updated documentation julius 4966d 21h /openrisc
495 ORPSoC adding more accessor functions to Micron SDRAM model. julius 4966d 21h /openrisc
494 Change to ensure handles ctrl-C correctly with empty line. jeremybennett 4977d 14h /openrisc
493 ORPSoC VPI JTAG interface, hopefully fix 64-bit machine compile issues. julius 4979d 23h /openrisc
492 ORPSoC VPI interface for modelsim and documentation update julius 4980d 21h /openrisc
491 ORPSoC or1200_monitor update. julius 4981d 07h /openrisc
490 Updates to fix spurious test failures and register scheduling. jeremybennett 4985d 13h /openrisc
489 ORPSoC sw cleanup. Remove warnings. julius 4990d 20h /openrisc
488 ORPSoC OR1200 driver - tick timer exception handler reverted to generic - cpu tick function hook used as default in handler table. OR1200 timer demo sw for board added. julius 4990d 20h /openrisc
487 ORPSoC main software makefile update julius 4993d 18h /openrisc
486 ORPSoC updates, mainly software, i2c driver julius 4993d 18h /openrisc
485 ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 julius 4997d 23h /openrisc
484 Changes to make r12 call-saved and to bring wchar tests in line. jeremybennett 4998d 21h /openrisc
483 Updated with new opcodes to generate random numbers and to identify us as Or1ksim. jeremybennett 5000d 23h /openrisc

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