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[/] [openrisc] - Rev 543

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Rev Log message Author Age Path
543 i2c_master_slave bug fix for slave, potentially holding SDA low when master wants to send stop. julius 4789d 00h /openrisc
542 ORPSoC scripts cleanup. Now centralised.

Documentation updated for ml501's SPI programming, noting issues with ISE12.		 julius 4794d 13h /openrisc
541 uC/OS-II port update - maintain cache settings in SR for new tasks. Thanks to contributor Stefan Kristiansson julius 4796d 19h /openrisc
540 Ensure the re-entrancy structure is re-initialized on restart. jeremybennett 4797d 15h /openrisc
539 newlib update - sync exception stack size define between crt0 and or1k-support library julius 4797d 21h /openrisc
538 or1ksim updates. spr-def.h updates, Cygwin compile error fixes. julius 4804d 18h /openrisc
537 ORPSoC or1200 fix for l.rfe bug, and when multiply is disabled. julius 4805d 11h /openrisc
536 ORPSoC - removing duplicate ethmac toplevel file. julius 4809d 00h /openrisc
535 ORPSoC - adding sw tests for l.rfe julius 4810d 15h /openrisc
534 Some ABI updates (64-bit values in 32-bit registers, FP optional) yannv 4814d 20h /openrisc
533 First draft of 2011 review of OR1K architecture specification. yannv 4815d 00h /openrisc
532 Ensure the halted flag is cleared when the processor is unstalled. jeremybennett 4815d 14h /openrisc
531 Quick fix to frame analysis bug which returned invalid frame ID at startup. jeremybennett 4815d 22h /openrisc
530 ORPSoC update

Ethernet MAC Wishbone interface fixes

Beginnings of software update.

ML501 backend script fixes for new ISE		 julius 4817d 23h /openrisc
529 or_debug_proxy updates julius 4821d 13h /openrisc
528 ORPSoC SPI flash programming link script bug fix julius 4822d 23h /openrisc
527 newlib-1.18.0 port update, name of support library header now or1k-support.h julius 4823d 13h /openrisc
526 uC/OS-II port fix for user interrupt handler julius 4823d 20h /openrisc
525 uC/OS-II port fix: account for redzone during task stack initialisation julius 4823d 21h /openrisc
524 Various tidy ups to GDB and updates to the simulation boards for the latest GCC. jeremybennett 4828d 16h /openrisc

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