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Rev Log message Author Age Path
84 Remove duplicated directories. jeremybennett 5260d 18h /openrisc
83 Fix to use -1 to invalidate cache tags. Suggested by John Alfredo. jeremybennett 5261d 08h /openrisc
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.
jeremybennett 5261d 09h /openrisc
81 Directory no longer used. jeremybennett 5261d 09h /openrisc
80 Add missing configuration files to SVN. jeremybennett 5261d 13h /openrisc
79 Fixed retry loop in or_debug_proxy, hopefully more stable when physically resetting the board julius 5273d 14h /openrisc
78 Fixed typo in Silos workaround script rherveille 5274d 09h /openrisc
77 Added support for Silvaco's Silos simulator
Added workaround for Silos's exit code behaviour
rherveille 5274d 09h /openrisc
76 Added: +libext+.v
Added: +incdir+.
rherveille 5275d 09h /openrisc
75 Fixed toolchain script's cygwin ncurses check julius 5280d 11h /openrisc
74 Toolchain script fix for ncurses header checking julius 5298d 14h /openrisc
73 toolchain script error fix julius 5298d 15h /openrisc
72 Toolchain install script: or1ksim location changed, few tweaks julius 5301d 12h /openrisc
71 ORPSoC board builds, adding readmes julius 5317d 18h /openrisc
70 ORPSoC cycle accurate trace generation now compatible with latest version of Verilator \(3.800\) - This will break VCD generation on systems which earlier verilator versions\! julius 5321d 23h /openrisc
69 ORPSoC xilinx ml501 board update - added ethernet eupport and software test julius 5322d 00h /openrisc
68 Fixed up a couple of Makefile things in ORPSoCv2 julius 5324d 16h /openrisc
67 New synthesizable builds of ORPSoC - first for the Xilinx ML501 Virtex 5 board, with working Xilinx MIG DDR2 Controller - added new pad option to bin2vmem, moved spi controller from or1k_startup module to its own directory julius 5324d 18h /openrisc
66 Fixed the simulator-assisted printf l.nop in cycle accurate, and supporting software. julius 5344d 17h /openrisc
65 ORPSoCv2 update: or1200_defines DVRDCR value, verilog testbench uart decoder fix julius 5348d 23h /openrisc

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