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1153 When multiple interrupts were pending, e.g. TX buffer empty and RX
available, reading the UART's IIR register could potentially clear a
TX interrupt before it had been sent to the processor, thus dropping
the interrupt permanently.

Fix tested w/ both eCos and uclinux.
sfurman 7755d 16h /or1k/branches/branch_qmem
1152 *** empty log message *** phoenix 7755d 20h /or1k/branches/branch_qmem
1151 *** empty log message *** phoenix 7755d 20h /or1k/branches/branch_qmem
1150 remove unneded include phoenix 7755d 22h /or1k/branches/branch_qmem
1149 *** empty log message *** phoenix 7756d 09h /or1k/branches/branch_qmem
1148 *** empty log message *** phoenix 7756d 10h /or1k/branches/branch_qmem
1147 remove unneeded include phoenix 7756d 10h /or1k/branches/branch_qmem
1146 cygwin fix phoenix 7756d 10h /or1k/branches/branch_qmem
1145 1) Fix trivial bug w/ transmitter empty interrupts that I introduced in the
last check-in.
2) Improve printed output from debugging-only uart_status() routine.
sfurman 7756d 10h /or1k/branches/branch_qmem
1144 Speed up gdb when running with serial targets:

When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)

When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump.
sfurman 7758d 16h /or1k/branches/branch_qmem
1143 Make UART transmitter-empty interrupts match both 16450 and 16550 behavior. sfurman 7759d 07h /or1k/branches/branch_qmem
1142 Speed up gdb when running with serial targets:

When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)

When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump.
sfurman 7759d 07h /or1k/branches/branch_qmem
1141 WB = 1/2 RISC clock test code enabled. lampret 7760d 16h /or1k/branches/branch_qmem
1140 Fixed OR1200_CLKDIV_x_SUPPORTED defines. Fixed order of ifdefs. lampret 7760d 16h /or1k/branches/branch_qmem
1139 Fixed OR1200_CLKDIV_x_SUPPORTED defines. Better description. lampret 7760d 16h /or1k/branches/branch_qmem
1138 Added some information how to run simulations. lampret 7761d 11h /or1k/branches/branch_qmem
1137 Added RFRAM generic and Altera lpm library. lampret 7761d 11h /or1k/branches/branch_qmem
1136 Add altera lpm library. lampret 7761d 11h /or1k/branches/branch_qmem
1135 Added get_gpr support for OR1200_RFRAM_GENERIC lampret 7761d 11h /or1k/branches/branch_qmem
1134 Changed location of debug test code to 0. lampret 7761d 11h /or1k/branches/branch_qmem

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