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[/] [or1k/] [branches/] [stable_0_1_x/] [or1ksim/] [cpu/] [or1k/] [except.h] - Rev 1765

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1765 root 5771d 03h /or1k/branches/stable_0_1_x/or1ksim/cpu/or1k/except.h
1356 This commit was manufactured by cvs2svn to create branch 'stable_0_1_x'. 7259d 15h /or1k/branches/stable_0_1_x/or1ksim/cpu/or1k/except.h
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7261d 08h /or1k/branches/stable_0_1_x/or1ksim/cpu/or1k/except.h
599 No more low/high priority interrupts (PICPR removed). Added tick timer exception. simons 8378d 02h /or1k/branches/stable_0_1_x/or1ksim/cpu/or1k/except.h
479 connection with gdb repaired; temp_except_delay removed; lot of except and debug code cleaned; sys 203 causes stall under gdb; non-sim memory area log bug fixed markom 8409d 11h /or1k/branches/stable_0_1_x/or1ksim/cpu/or1k/except.h
437 When lsu instruction produce exception registers are preserved. simons 8416d 11h /or1k/branches/stable_0_1_x/or1ksim/cpu/or1k/except.h
261 modified memory accesses; added cfg script; added pic test basic entry of vga; some extensions to mc markom 8456d 15h /or1k/branches/stable_0_1_x/or1ksim/cpu/or1k/except.h
137 Added TRAP exception chris 8590d 16h /or1k/branches/stable_0_1_x/or1ksim/cpu/or1k/except.h
102 Major update to include PM, PIC, Cache Mngmnt and non-interactive mode. lampret 8624d 20h /or1k/branches/stable_0_1_x/or1ksim/cpu/or1k/except.h
99 *** empty log message *** lampret 8639d 21h /or1k/branches/stable_0_1_x/or1ksim/cpu/or1k/except.h
77 Regular update. lampret 8824d 18h /or1k/branches/stable_0_1_x/or1ksim/cpu/or1k/except.h
64 SPR bit definition moved to spr_defs.h. lampret 8843d 18h /or1k/branches/stable_0_1_x/or1ksim/cpu/or1k/except.h
54 Regular maintenance. lampret 8894d 18h /or1k/branches/stable_0_1_x/or1ksim/cpu/or1k/except.h
49 Changed simulation mode to non-virtual (real). lampret 8955d 14h /or1k/branches/stable_0_1_x/or1ksim/cpu/or1k/except.h
38 Virtual machine at the moment. lampret 8967d 01h /or1k/branches/stable_0_1_x/or1ksim/cpu/or1k/except.h
33 Handling of or1k exceptions. lampret 8971d 00h /or1k/branches/stable_0_1_x/or1ksim/cpu/or1k/except.h

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