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[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [testbench/] [mmu.c] - Rev 1765

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1765 root 5730d 16h /or1k/branches/stable_0_2_x/or1ksim/testbench/mmu.c
1646 This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'. 6877d 19h /or1k/branches/stable_0_2_x/or1ksim/testbench/mmu.c
1614 CI should not be set in dMMU translation tables or one gets different behaviour with dMMU on or off in case data cache is enabled. care should be taken for addresses higher than 0x7fff_ffff where the situation is just reversed. (since or1200 does not cache upper half of address space if there is no dMMU) phoenix 6922d 14h /or1k/branches/stable_0_2_x/or1ksim/testbench/mmu.c
1446 Cosmetic fixes nogj 7170d 23h /or1k/branches/stable_0_2_x/or1ksim/testbench/mmu.c
1024 Mess with printf/PRINTF fixed. Ethernet test changed to support latest changes. simons 8110d 03h /or1k/branches/stable_0_2_x/or1ksim/testbench/mmu.c
997 PRINTF should be used instead of printf; command redirection repaired markom 8122d 06h /or1k/branches/stable_0_2_x/or1ksim/testbench/mmu.c
970 Testbench is now running on ORP architecture platform. simons 8129d 17h /or1k/branches/stable_0_2_x/or1ksim/testbench/mmu.c
957 Flash at 0x04000000 RAM at 0x00000000. Only MMU test works. simons 8131d 19h /or1k/branches/stable_0_2_x/or1ksim/testbench/mmu.c
639 MMU cache inhibit bit test added. simons 8324d 17h /or1k/branches/stable_0_2_x/or1ksim/testbench/mmu.c
600 No more low/high priority interrupts (PICPR removed). Added tick timer exception. simons 8337d 16h /or1k/branches/stable_0_2_x/or1ksim/testbench/mmu.c
509 unused var warning corrected markom 8354d 01h /or1k/branches/stable_0_2_x/or1ksim/testbench/mmu.c
480 RTL_SIM define added for shorter simulation runtime. simons 8369d 00h /or1k/branches/stable_0_2_x/or1ksim/testbench/mmu.c
466 EEAR is used for determing ITLB miss and IPF page address. simons 8369d 16h /or1k/branches/stable_0_2_x/or1ksim/testbench/mmu.c
457 Page size set to 8192. simons 8373d 20h /or1k/branches/stable_0_2_x/or1ksim/testbench/mmu.c
448 Permission test added. simons 8375d 06h /or1k/branches/stable_0_2_x/or1ksim/testbench/mmu.c
417 ITLB test tested on simulator. simons 8379d 15h /or1k/branches/stable_0_2_x/or1ksim/testbench/mmu.c
415 DTLB test tested on simulator. simons 8380d 16h /or1k/branches/stable_0_2_x/or1ksim/testbench/mmu.c
413 some section changes markom 8381d 01h /or1k/branches/stable_0_2_x/or1ksim/testbench/mmu.c
412 *** empty log message *** simons 8381d 02h /or1k/branches/stable_0_2_x/or1ksim/testbench/mmu.c
410 MMU test added. simons 8381d 23h /or1k/branches/stable_0_2_x/or1ksim/testbench/mmu.c

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