OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim] - Rev 1517

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1517 Use uint8_t instead of char nogj 6951d 23h /or1k/branches/stable_0_2_x/or1ksim
1516 Make non-writeable memory writeable by the debug core nogj 6951d 23h /or1k/branches/stable_0_2_x/or1ksim
1515 Use the new debug channel code instead of a compile time macro nogj 6951d 23h /or1k/branches/stable_0_2_x/or1ksim
1514 Fix compileation with --enable-execution=simple nogj 6951d 23h /or1k/branches/stable_0_2_x/or1ksim
1513 Remove the flag global nogj 6951d 23h /or1k/branches/stable_0_2_x/or1ksim
1512 Fix compileing on windows (Reported my Kuoping Hsu and Girish Venkatar) nogj 6951d 23h /or1k/branches/stable_0_2_x/or1ksim
1511 Fix typo nogj 6951d 23h /or1k/branches/stable_0_2_x/or1ksim
1510 Create a seporate debug channel to dump exceptions to nogj 6951d 23h /or1k/branches/stable_0_2_x/or1ksim
1509 Remove 08 prefix from PRIdREG nogj 6951d 23h /or1k/branches/stable_0_2_x/or1ksim
1508 Remove m{f,t}spr calls where we can access the spr directly nogj 6951d 23h /or1k/branches/stable_0_2_x/or1ksim
1507 Use readline by default if it is availible nogj 6951d 23h /or1k/branches/stable_0_2_x/or1ksim
1506 * Remove very slow {set,test}sprbit{,s} functions.
* Remove uses of getsprbits in time critical functions.
nogj 6951d 23h /or1k/branches/stable_0_2_x/or1ksim
1505 Make output clearer nogj 6966d 22h /or1k/branches/stable_0_2_x/or1ksim
1504 Use proper types nogj 6966d 22h /or1k/branches/stable_0_2_x/or1ksim
1503 Move loopback handling out of uart_clock16 nogj 6966d 22h /or1k/branches/stable_0_2_x/or1ksim
1502 Move interrupt handling out of uart_clock16 nogj 6966d 22h /or1k/branches/stable_0_2_x/or1ksim
1501 Move RX logic out of uart_clock16 nogj 6966d 22h /or1k/branches/stable_0_2_x/or1ksim
1500 Move vapi command handling out of uart_clock16 nogj 6966d 22h /or1k/branches/stable_0_2_x/or1ksim
1499 Move TX logic out of uart_clock16 nogj 6966d 22h /or1k/branches/stable_0_2_x/or1ksim
1498 Correct a couple of tests nogj 6966d 22h /or1k/branches/stable_0_2_x/or1ksim

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.