URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_34/] [or1ksim/] [cache/] [icache_model.h] - Rev 1350

Rev	Log message	Author	Age	Path
1350	Mark a simulated cpu address as such, by introducing the new oraddr_t type	nogj	7080d 07h	/or1k/tags/nog_patch_34/or1ksim/cache/icache_model.h
1308	Gyorgy Jeney: extensive cleanup	phoenix	7285d 02h	/or1k/tags/nog_patch_34/or1ksim/cache/icache_model.h
631	Real cache access is simulated now.	simons	8187d 03h	/or1k/tags/nog_patch_34/or1ksim/cache/icache_model.h
429	cache configuration added	markom	8236d 10h	/or1k/tags/nog_patch_34/or1ksim/cache/icache_model.h
102	Major update to include PM, PIC, Cache Mngmnt and non-interactive mode.	lampret	8443d 20h	/or1k/tags/nog_patch_34/or1ksim/cache/icache_model.h
76	regular update	lampret	8643d 17h	/or1k/tags/nog_patch_34/or1ksim/cache/icache_model.h
5	Data and instruction cache simulation added.	lampret	8885d 03h	/or1k/tags/nog_patch_34/or1ksim/cache/icache_model.h