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[/] [or1k/] [tags/] [nog_patch_39/] [or1ksim/] [cpu/] [common/] [abstract.c] - Rev 1354

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1354 typing fixes phoenix 7127d 16h /or1k/tags/nog_patch_39/or1ksim/cpu/common/abstract.c
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7128d 13h /or1k/tags/nog_patch_39/or1ksim/cpu/common/abstract.c
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7141d 17h /or1k/tags/nog_patch_39/or1ksim/cpu/common/abstract.c
1324 memory access functions fixes phoenix 7239d 08h /or1k/tags/nog_patch_39/or1ksim/cpu/common/abstract.c
1319 cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections. phoenix 7245d 08h /or1k/tags/nog_patch_39/or1ksim/cpu/common/abstract.c
1308 Gyorgy Jeney: extensive cleanup phoenix 7333d 07h /or1k/tags/nog_patch_39/or1ksim/cpu/common/abstract.c
1244 Added "cm" command to copy data inside memory.
Make or1ksim work on little endian platforms.
Port to Mac OS X.
Some bugfixes.
Allow JTAG write access to read-only memory regions.		 hpanther 7500d 16h /or1k/tags/nog_patch_39/or1ksim/cpu/common/abstract.c
1240 additional functions to bypass cache and mmu needed for peripheral devices phoenix 7505d 02h /or1k/tags/nog_patch_39/or1ksim/cpu/common/abstract.c
1218 segfault when there is no memory context fix phoenix 7553d 05h /or1k/tags/nog_patch_39/or1ksim/cpu/common/abstract.c
997 PRINTF should be used instead of printf; command redirection repaired markom 8029d 22h /or1k/tags/nog_patch_39/or1ksim/cpu/common/abstract.c
992 A bug when cache enabled and bus error comes fixed. simons 8031d 13h /or1k/tags/nog_patch_39/or1ksim/cpu/common/abstract.c
970 Testbench is now running on ORP architecture platform. simons 8037d 09h /or1k/tags/nog_patch_39/or1ksim/cpu/common/abstract.c
897 improved CUC GUI; pre/unroll bugs fixed markom 8066d 14h /or1k/tags/nog_patch_39/or1ksim/cpu/common/abstract.c
884 code cleaning - a lot of global variables moved to runtime struct markom 8073d 20h /or1k/tags/nog_patch_39/or1ksim/cpu/common/abstract.c
882 Routine for adjusting read and write delay for devices added. simons 8076d 18h /or1k/tags/nog_patch_39/or1ksim/cpu/common/abstract.c
860 Added delayr and delayw variable initialization (default value 1) ivang 8121d 08h /or1k/tags/nog_patch_39/or1ksim/cpu/common/abstract.c
638 TLBTR CI bit is now working properly. simons 8232d 09h /or1k/tags/nog_patch_39/or1ksim/cpu/common/abstract.c
631 Real cache access is simulated now. simons 8235d 08h /or1k/tags/nog_patch_39/or1ksim/cpu/common/abstract.c
611 EEAR register is not changed by trap, sys, int, tick and range exception. simons 8241d 22h /or1k/tags/nog_patch_39/or1ksim/cpu/common/abstract.c
599 No more low/high priority interrupts (PICPR removed). Added tick timer exception. simons 8245d 08h /or1k/tags/nog_patch_39/or1ksim/cpu/common/abstract.c

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