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[/] [or1k/] [tags/] [nog_patch_45] - Rev 994

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Rev	Log message	Author	Age	Path
994	Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board.	lampret	8028d 22h	/or1k/tags/nog_patch_45
993	Fixed IMMU bug.	lampret	8028d 22h	/or1k/tags/nog_patch_45
992	A bug when cache enabled and bus error comes fixed.	simons	8029d 07h	/or1k/tags/nog_patch_45
991	Different memory controller.	simons	8029d 07h	/or1k/tags/nog_patch_45
990	Test is now complete.	simons	8029d 07h	/or1k/tags/nog_patch_45
989	c++ is making problems so, for now, it is excluded.	simons	8030d 15h	/or1k/tags/nog_patch_45
988	ORP architecture supported.	simons	8031d 07h	/or1k/tags/nog_patch_45
987	ORP architecture supported.	simons	8031d 14h	/or1k/tags/nog_patch_45
986	outputs out of function are not registered anymore	markom	8031d 15h	/or1k/tags/nog_patch_45
985	DTLB translation doesn't work on or1ksim when IC/DC enabled.	lampret	8032d 02h	/or1k/tags/nog_patch_45
984	Disable SB until it is tested	lampret	8032d 02h	/or1k/tags/nog_patch_45
983	First checkin	lampret	8032d 04h	/or1k/tags/nog_patch_45
982	Moved to sim/bin	lampret	8032d 04h	/or1k/tags/nog_patch_45
981	First checkin.	lampret	8032d 04h	/or1k/tags/nog_patch_45
980	Removed sim.tcl that shouldn't be here.	lampret	8032d 04h	/or1k/tags/nog_patch_45
979	Removed old test case binaries.	lampret	8032d 04h	/or1k/tags/nog_patch_45
978	Added variable delay for SRAM.	lampret	8032d 04h	/or1k/tags/nog_patch_45
977	Added store buffer.	lampret	8032d 04h	/or1k/tags/nog_patch_45
976	Added store buffer	lampret	8032d 04h	/or1k/tags/nog_patch_45
975	First checkin	lampret	8032d 04h	/or1k/tags/nog_patch_45

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[/] [or1k/] [tags/] [nog_patch_45] - Rev 994

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