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[/] [or1k/] [tags/] [nog_patch_50/] [or1ksim/] [cache/] [dcache_model.c] - Rev 992

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992 A bug when cache enabled and bus error comes fixed. simons 8053d 22h /or1k/tags/nog_patch_50/or1ksim/cache/dcache_model.c
884 code cleaning - a lot of global variables moved to runtime struct markom 8096d 04h /or1k/tags/nog_patch_50/or1ksim/cache/dcache_model.c
638 TLBTR CI bit is now working properly. simons 8254d 18h /or1k/tags/nog_patch_50/or1ksim/cache/dcache_model.c
631 Real cache access is simulated now. simons 8257d 17h /or1k/tags/nog_patch_50/or1ksim/cache/dcache_model.c
541 lot of new parameters concerning memory delays added; bpb parameter moved from cpu to new bpb section; UPDATE YOUR .CFG FILES! markom 8279d 02h /or1k/tags/nog_patch_50/or1ksim/cache/dcache_model.c
428 cache configuration added markom 8307d 00h /or1k/tags/nog_patch_50/or1ksim/cache/dcache_model.c
261 modified memory accesses; added cfg script; added pic test basic entry of vga; some extensions to mc markom 8346d 05h /or1k/tags/nog_patch_50/or1ksim/cache/dcache_model.c
167 - SPR values corrected
- testbenches now work
- lot of optimizations, use --disable-debugmod for optimal performance
- some tick timer bugs fixed		 markom 8432d 01h /or1k/tags/nog_patch_50/or1ksim/cache/dcache_model.c
102 Major update to include PM, PIC, Cache Mngmnt and non-interactive mode. lampret 8514d 10h /or1k/tags/nog_patch_50/or1ksim/cache/dcache_model.c
54 Regular maintenance. lampret 8784d 08h /or1k/tags/nog_patch_50/or1ksim/cache/dcache_model.c
26 Clean up. lampret 8891d 11h /or1k/tags/nog_patch_50/or1ksim/cache/dcache_model.c
5 Data and instruction cache simulation added. lampret 8955d 17h /or1k/tags/nog_patch_50/or1ksim/cache/dcache_model.c

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