URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_52/] [or1ksim/] [cache/] [dcache_model.c] - Rev 638

Rev	Log message	Author	Age	Path
638	TLBTR CI bit is now working properly.	simons	8183d 14h	/or1k/tags/nog_patch_52/or1ksim/cache/dcache_model.c
631	Real cache access is simulated now.	simons	8186d 13h	/or1k/tags/nog_patch_52/or1ksim/cache/dcache_model.c
541	lot of new parameters concerning memory delays added; bpb parameter moved from cpu to new bpb section; UPDATE YOUR .CFG FILES!	markom	8207d 22h	/or1k/tags/nog_patch_52/or1ksim/cache/dcache_model.c
428	cache configuration added	markom	8235d 20h	/or1k/tags/nog_patch_52/or1ksim/cache/dcache_model.c
261	modified memory accesses; added cfg script; added pic test basic entry of vga; some extensions to mc	markom	8275d 01h	/or1k/tags/nog_patch_52/or1ksim/cache/dcache_model.c
167	- SPR values corrected - testbenches now work - lot of optimizations, use --disable-debugmod for optimal performance - some tick timer bugs fixed	markom	8360d 21h	/or1k/tags/nog_patch_52/or1ksim/cache/dcache_model.c
102	Major update to include PM, PIC, Cache Mngmnt and non-interactive mode.	lampret	8443d 06h	/or1k/tags/nog_patch_52/or1ksim/cache/dcache_model.c
54	Regular maintenance.	lampret	8713d 04h	/or1k/tags/nog_patch_52/or1ksim/cache/dcache_model.c
26	Clean up.	lampret	8820d 07h	/or1k/tags/nog_patch_52/or1ksim/cache/dcache_model.c
5	Data and instruction cache simulation added.	lampret	8884d 13h	/or1k/tags/nog_patch_52/or1ksim/cache/dcache_model.c