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[/] [or1k/] [tags/] [nog_patch_58/] - Rev 996

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Rev	Log message	Author	Age	Path
996	some minor bugs fixed	markom	7997d 21h	/or1k/tags/nog_patch_58
994	Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board.	lampret	7998d 05h	/or1k/tags/nog_patch_58
993	Fixed IMMU bug.	lampret	7998d 05h	/or1k/tags/nog_patch_58
992	A bug when cache enabled and bus error comes fixed.	simons	7998d 14h	/or1k/tags/nog_patch_58
991	Different memory controller.	simons	7998d 14h	/or1k/tags/nog_patch_58
990	Test is now complete.	simons	7998d 14h	/or1k/tags/nog_patch_58
989	c++ is making problems so, for now, it is excluded.	simons	7999d 22h	/or1k/tags/nog_patch_58
988	ORP architecture supported.	simons	8000d 13h	/or1k/tags/nog_patch_58
987	ORP architecture supported.	simons	8000d 21h	/or1k/tags/nog_patch_58
986	outputs out of function are not registered anymore	markom	8000d 21h	/or1k/tags/nog_patch_58
985	DTLB translation doesn't work on or1ksim when IC/DC enabled.	lampret	8001d 09h	/or1k/tags/nog_patch_58
984	Disable SB until it is tested	lampret	8001d 09h	/or1k/tags/nog_patch_58
983	First checkin	lampret	8001d 11h	/or1k/tags/nog_patch_58
982	Moved to sim/bin	lampret	8001d 11h	/or1k/tags/nog_patch_58
981	First checkin.	lampret	8001d 11h	/or1k/tags/nog_patch_58
980	Removed sim.tcl that shouldn't be here.	lampret	8001d 11h	/or1k/tags/nog_patch_58
979	Removed old test case binaries.	lampret	8001d 11h	/or1k/tags/nog_patch_58
978	Added variable delay for SRAM.	lampret	8001d 11h	/or1k/tags/nog_patch_58
977	Added store buffer.	lampret	8001d 11h	/or1k/tags/nog_patch_58
976	Added store buffer	lampret	8001d 11h	/or1k/tags/nog_patch_58

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[/] [or1k/] [tags/] [nog_patch_58/] - Rev 996

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