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[/] [or1k/] [tags/] [nog_patch_66/] [gen_or1k_isa/] [sources/] [opcode/] [or32.c] - Rev 1452

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1452 Implement a dynamic recompiler to speed up the execution nogj 7044d 06h /or1k/tags/nog_patch_66/gen_or1k_isa/sources/opcode/or32.c
1440 Reclasify l.trap and l.sys to be an exception instruction nogj 7044d 06h /or1k/tags/nog_patch_66/gen_or1k_isa/sources/opcode/or32.c
1384 Fix the parameters to the l.ff1/l.maci instructions nogj 7059d 09h /or1k/tags/nog_patch_66/gen_or1k_isa/sources/opcode/or32.c
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7094d 04h /or1k/tags/nog_patch_66/gen_or1k_isa/sources/opcode/or32.c
1346 Remove the global op structure nogj 7107d 08h /or1k/tags/nog_patch_66/gen_or1k_isa/sources/opcode/or32.c
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.
nogj 7107d 08h /or1k/tags/nog_patch_66/gen_or1k_isa/sources/opcode/or32.c
1341 Mark wich operand is the destination operand in the architechture definition nogj 7107d 09h /or1k/tags/nog_patch_66/gen_or1k_isa/sources/opcode/or32.c
1338 l.ff1 instruction added andreje 7123d 06h /or1k/tags/nog_patch_66/gen_or1k_isa/sources/opcode/or32.c
1309 removed includes phoenix 7296d 02h /or1k/tags/nog_patch_66/gen_or1k_isa/sources/opcode/or32.c
1308 Gyorgy Jeney: extensive cleanup phoenix 7298d 23h /or1k/tags/nog_patch_66/gen_or1k_isa/sources/opcode/or32.c
1295 Updated instruction set descriptions. Changed FP instructions encoding. lampret 7320d 23h /or1k/tags/nog_patch_66/gen_or1k_isa/sources/opcode/or32.c
1286 Changed desciption of the l.cust5 insns lampret 7370d 02h /or1k/tags/nog_patch_66/gen_or1k_isa/sources/opcode/or32.c
1285 Changed desciption of the l.cust5 insns lampret 7370d 02h /or1k/tags/nog_patch_66/gen_or1k_isa/sources/opcode/or32.c
1169 Added support for l.addc instruction. csanchez 7683d 02h /or1k/tags/nog_patch_66/gen_or1k_isa/sources/opcode/or32.c
1114 Added cvs log keywords lampret 7837d 18h /or1k/tags/nog_patch_66/gen_or1k_isa/sources/opcode/or32.c
1034 Fixed encoding for l.div/l.divu. lampret 7979d 19h /or1k/tags/nog_patch_66/gen_or1k_isa/sources/opcode/or32.c
879 Initial version of OpenRISC Custom Unit Compiler added markom 8045d 05h /or1k/tags/nog_patch_66/gen_or1k_isa/sources/opcode/or32.c
801 l.muli instruction added markom 8137d 09h /or1k/tags/nog_patch_66/gen_or1k_isa/sources/opcode/or32.c
722 floating point registers are obsolete; GPRs should be used instead markom 8165d 08h /or1k/tags/nog_patch_66/gen_or1k_isa/sources/opcode/or32.c
720 single floating point support added markom 8165d 12h /or1k/tags/nog_patch_66/gen_or1k_isa/sources/opcode/or32.c

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