OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_67] - Rev 999

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
999 Now every ramdisk image should have init program. simons 7995d 08h /or1k/tags/nog_patch_67
998 added missing fout initialization markom 7995d 10h /or1k/tags/nog_patch_67
997 PRINTF should be used instead of printf; command redirection repaired markom 7995d 11h /or1k/tags/nog_patch_67
996 some minor bugs fixed markom 7996d 10h /or1k/tags/nog_patch_67
994 Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board. lampret 7996d 17h /or1k/tags/nog_patch_67
993 Fixed IMMU bug. lampret 7996d 17h /or1k/tags/nog_patch_67
992 A bug when cache enabled and bus error comes fixed. simons 7997d 02h /or1k/tags/nog_patch_67
991 Different memory controller. simons 7997d 02h /or1k/tags/nog_patch_67
990 Test is now complete. simons 7997d 03h /or1k/tags/nog_patch_67
989 c++ is making problems so, for now, it is excluded. simons 7998d 10h /or1k/tags/nog_patch_67
988 ORP architecture supported. simons 7999d 02h /or1k/tags/nog_patch_67
987 ORP architecture supported. simons 7999d 09h /or1k/tags/nog_patch_67
986 outputs out of function are not registered anymore markom 7999d 10h /or1k/tags/nog_patch_67
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 7999d 21h /or1k/tags/nog_patch_67
984 Disable SB until it is tested lampret 7999d 22h /or1k/tags/nog_patch_67
983 First checkin lampret 8000d 00h /or1k/tags/nog_patch_67
982 Moved to sim/bin lampret 8000d 00h /or1k/tags/nog_patch_67
981 First checkin. lampret 8000d 00h /or1k/tags/nog_patch_67
980 Removed sim.tcl that shouldn't be here. lampret 8000d 00h /or1k/tags/nog_patch_67
979 Removed old test case binaries. lampret 8000d 00h /or1k/tags/nog_patch_67

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.