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[/] [or1k/] [tags/] [nog_patch_68] - Rev 1151

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Rev Log message Author Age Path
1151 *** empty log message *** phoenix 7756d 14h /or1k/tags/nog_patch_68
1150 remove unneded include phoenix 7756d 15h /or1k/tags/nog_patch_68
1149 *** empty log message *** phoenix 7757d 03h /or1k/tags/nog_patch_68
1148 *** empty log message *** phoenix 7757d 03h /or1k/tags/nog_patch_68
1147 remove unneeded include phoenix 7757d 03h /or1k/tags/nog_patch_68
1146 cygwin fix phoenix 7757d 03h /or1k/tags/nog_patch_68
1145 1) Fix trivial bug w/ transmitter empty interrupts that I introduced in the
last check-in.
2) Improve printed output from debugging-only uart_status() routine.
sfurman 7757d 03h /or1k/tags/nog_patch_68
1144 Speed up gdb when running with serial targets:

When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)

When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump.
sfurman 7759d 09h /or1k/tags/nog_patch_68
1143 Make UART transmitter-empty interrupts match both 16450 and 16550 behavior. sfurman 7760d 00h /or1k/tags/nog_patch_68
1142 Speed up gdb when running with serial targets:

When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)

When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump.
sfurman 7760d 00h /or1k/tags/nog_patch_68
1141 WB = 1/2 RISC clock test code enabled. lampret 7761d 09h /or1k/tags/nog_patch_68
1140 Fixed OR1200_CLKDIV_x_SUPPORTED defines. Fixed order of ifdefs. lampret 7761d 09h /or1k/tags/nog_patch_68
1139 Fixed OR1200_CLKDIV_x_SUPPORTED defines. Better description. lampret 7761d 09h /or1k/tags/nog_patch_68
1138 Added some information how to run simulations. lampret 7762d 04h /or1k/tags/nog_patch_68
1137 Added RFRAM generic and Altera lpm library. lampret 7762d 04h /or1k/tags/nog_patch_68
1136 Add altera lpm library. lampret 7762d 04h /or1k/tags/nog_patch_68
1135 Added get_gpr support for OR1200_RFRAM_GENERIC lampret 7762d 04h /or1k/tags/nog_patch_68
1134 Changed location of debug test code to 0. lampret 7762d 04h /or1k/tags/nog_patch_68
1133 Adding OR1200_CLMODE_1TO2 test code. lampret 7762d 05h /or1k/tags/nog_patch_68
1132 RFRAM defines comments updated. Altera LPM option added. lampret 7762d 05h /or1k/tags/nog_patch_68

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