OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel-0-3-0-rc2/] [or1ksim/] [cpu] - Rev 1244

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
1244 Added "cm" command to copy data inside memory.
Make or1ksim work on little endian platforms.
Port to Mac OS X.
Some bugfixes.
Allow JTAG write access to read-only memory regions.		 hpanther 7468d 01h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
1240 additional functions to bypass cache and mmu needed for peripheral devices phoenix 7472d 11h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
1218 segfault when there is no memory context fix phoenix 7520d 14h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
1204 added additional field into executed log wich besides EA also prints PA (physical address) phoenix 7552d 12h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
1203 value stored in ITLB and DTLB match registers was wrong. fixed. phoenix 7552d 12h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
1202 at exception print insn number to ease debugging phoenix 7552d 12h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
1178 avoid another immu exception that should not happen phoenix 7673d 13h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
1177 more informative output phoenix 7674d 20h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
1174 fix for immu exceptions that never should have happened phoenix 7676d 15h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
1170 Added support for l.addc instruction. csanchez 7684d 19h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
1169 Added support for l.addc instruction. csanchez 7684d 20h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
1150 remove unneded include phoenix 7765d 01h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
1117 Ignore generated files for CVS purposes sfurman 7808d 16h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
1114 Added cvs log keywords lampret 7839d 12h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
1106 Cache invalidate bug fixed again (it was ok before). simons 7889d 00h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
1097 Cache invalidate bug fixed. simons 7895d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
1086 STACK_ARGS is getting obsolete and is only needed by simprintf, which needs it to be 0. lampret 7902d 14h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
1061 ELF sym loading improved markom 7949d 01h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
1049 Added "breaks" command that prints all set breakpoints. ivang 7975d 23h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
1034 Fixed encoding for l.div/l.divu. lampret 7981d 13h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.