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[/] [or1k/] [tags/] [rel_1/] [or1200] - Rev 504

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Rev Log message Author Age Path
504 New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs. lampret 8257d 14h /or1k/tags/rel_1/or1200
402 Added OR1200_GENERIC_MULTP2_32X32 and OR1200_ASIC_MULTP2_32X32 lampret 8287d 18h /or1k/tags/rel_1/or1200
401 *** empty log message *** simons 8291d 04h /or1k/tags/rel_1/or1200
400 force_dslot_fetch does not work - allways zero. simons 8291d 04h /or1k/tags/rel_1/or1200
399 Trap insn couses break after exits ex_insn. simons 8291d 04h /or1k/tags/rel_1/or1200
391 Fixed except_stop width and fixed EX PC for 1400444f no-ops. lampret 8293d 23h /or1k/tags/rel_1/or1200
390 Changed instantiation name of VS RAMs. lampret 8294d 01h /or1k/tags/rel_1/or1200
387 Now FPGA and ASIC target are separate. lampret 8294d 03h /or1k/tags/rel_1/or1200
386 Fixed VS RAM instantiation - again. lampret 8294d 03h /or1k/tags/rel_1/or1200
370 Program counter divided to PPC and NPC. simons 8298d 01h /or1k/tags/rel_1/or1200
367 Changed DSR/DRR behavior and exception detection. lampret 8298d 14h /or1k/tags/rel_1/or1200
365 Added wb_cyc_o assignment after it was removed by accident. lampret 8299d 09h /or1k/tags/rel_1/or1200
360 Added OR1200_REGISTERED_INPUTS. lampret 8301d 01h /or1k/tags/rel_1/or1200
359 Added optional sampling of inputs. lampret 8301d 01h /or1k/tags/rel_1/or1200
358 Fixed virtual silicon single-port rams instantiation. lampret 8301d 01h /or1k/tags/rel_1/or1200
357 Fixed dbg_is_o assignment width. lampret 8301d 01h /or1k/tags/rel_1/or1200
356 Break point bug fixed simons 8301d 04h /or1k/tags/rel_1/or1200
354 Fixed width of du_except. lampret 8301d 22h /or1k/tags/rel_1/or1200
353 Cashes disabled. simons 8302d 08h /or1k/tags/rel_1/or1200
352 OR1200_REGISTERED_OUTPUTS can now be enabled. lampret 8303d 11h /or1k/tags/rel_1/or1200

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