URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_1] - Rev 170

Rev	Log message	Author	Age	Path
170	Added cfg regs. Moved all defines into one defines.v file. More cleanup.	lampret	8373d 07h	/or1k/tags/rel_1
169	Fixed memory cells. Moved monitor.h into monitor.v	lampret	8373d 07h	/or1k/tags/rel_1
168	Major clean-up.	lampret	8376d 21h	/or1k/tags/rel_1
167	- SPR values corrected - testbenches now work - lot of optimizations, use --disable-debugmod for optimal performance - some tick timer bugs fixed	markom	8377d 20h	/or1k/tags/rel_1
166	Fixed RAM's oen bug. Cache bypass under development.	lampret	8395d 07h	/or1k/tags/rel_1
165	Added variable ack of WB transfers (see NODELAY_WBx).	lampret	8395d 07h	/or1k/tags/rel_1
164	* empty log message *	lampret	8397d 09h	/or1k/tags/rel_1
163	Forgot files.f file.	lampret	8397d 09h	/or1k/tags/rel_1
162	Benches (under development).	lampret	8397d 09h	/or1k/tags/rel_1
161	Development version of RTL. Libraries are missing.	lampret	8397d 09h	/or1k/tags/rel_1
160	simulation script	lampret	8397d 09h	/or1k/tags/rel_1
159	synthesis scripts	lampret	8397d 10h	/or1k/tags/rel_1
158	Initial RTEMS import	chris	8407d 00h	/or1k/tags/rel_1
157	Update	simons	8414d 03h	/or1k/tags/rel_1
156	File moved to opcode.	simons	8414d 03h	/or1k/tags/rel_1
155	Update	simons	8414d 03h	/or1k/tags/rel_1
154	Updated for new runtime environment	chris	8420d 03h	/or1k/tags/rel_1
153	Writes to SPR_PC are now enabled	chris	8420d 03h	/or1k/tags/rel_1
152	Breakpoint exceptions from single step are not printed now.	chris	8420d 03h	/or1k/tags/rel_1
151	Typo in the previous commit. Sorry.	chris	8420d 03h	/or1k/tags/rel_1