URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_10] - Rev 1010

Rev	Log message	Author	Age	Path
1010	Import	ivang	7995d 23h	/or1k/tags/rel_10
1009	Import	ivang	7996d 00h	/or1k/tags/rel_10
1008	Import	ivang	7996d 00h	/or1k/tags/rel_10
1007	Import	ivang	7996d 00h	/or1k/tags/rel_10
1006	Import	ivang	7996d 01h	/or1k/tags/rel_10
1005	Import	ivang	7996d 01h	/or1k/tags/rel_10
1004	Now every ramdisk image should have init program.	simons	7996d 09h	/or1k/tags/rel_10
1003	cuc temporary files are deleted upon exiting	markom	7996d 09h	/or1k/tags/rel_10
1002	Now every ramdisk image should have init program.	simons	7996d 09h	/or1k/tags/rel_10
1001	fixed load/store state machine verilog generation errors	markom	7996d 09h	/or1k/tags/rel_10
1000	IC/DC cache enable routines fixed.	simons	7996d 10h	/or1k/tags/rel_10
999	Now every ramdisk image should have init program.	simons	7996d 11h	/or1k/tags/rel_10
998	added missing fout initialization	markom	7996d 13h	/or1k/tags/rel_10
997	PRINTF should be used instead of printf; command redirection repaired	markom	7996d 13h	/or1k/tags/rel_10
996	some minor bugs fixed	markom	7997d 12h	/or1k/tags/rel_10
994	Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board.	lampret	7997d 20h	/or1k/tags/rel_10
993	Fixed IMMU bug.	lampret	7997d 20h	/or1k/tags/rel_10
992	A bug when cache enabled and bus error comes fixed.	simons	7998d 05h	/or1k/tags/rel_10
991	Different memory controller.	simons	7998d 05h	/or1k/tags/rel_10
990	Test is now complete.	simons	7998d 05h	/or1k/tags/rel_10