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[/] [or1k/] [tags/] [rel_10] - Rev 895

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Rev Log message Author Age Path
895 Added simple trace buffer [only for Xilinx Virtex target]. Fixed instruction fetch abort when new exception is recognized. lampret 8067d 06h /or1k/tags/rel_10
894 Typing mistake fixed. simons 8069d 04h /or1k/tags/rel_10
893 Ethernet tested on xess board. simons 8069d 04h /or1k/tags/rel_10
891 eth_ledc not positioned correctly. Fixed. mohor 8069d 05h /or1k/tags/rel_10
890 Ethernet RXD pins were not positioned correctly. mohor 8069d 05h /or1k/tags/rel_10
889 Modified Ethernet model. ivang 8069d 10h /or1k/tags/rel_10
888 LCD 320x240 configuration added. simons 8070d 03h /or1k/tags/rel_10
887 Some additional instructions fixes. simons 8070d 13h /or1k/tags/rel_10
886 MMU registers reserved fields protected from writing. simons 8071d 12h /or1k/tags/rel_10
885 Some incorrect instructions fixed. simons 8071d 15h /or1k/tags/rel_10
884 code cleaning - a lot of global variables moved to runtime struct markom 8071d 18h /or1k/tags/rel_10
883 cuc updated, cuc prompt parsing; CSM analysis markom 8072d 13h /or1k/tags/rel_10
882 Routine for adjusting read and write delay for devices added. simons 8074d 16h /or1k/tags/rel_10
881 Normally uart rx and tx files should be in the current folder. mohor 8075d 08h /or1k/tags/rel_10
880 Library should not be erased during clean. mohor 8075d 09h /or1k/tags/rel_10
879 Initial version of OpenRISC Custom Unit Compiler added markom 8077d 12h /or1k/tags/rel_10
878 first release of atabug rherveille 8079d 05h /or1k/tags/rel_10
877 ata beta release rherveille 8079d 05h /or1k/tags/rel_10
876 Beta release of ATA simulation rherveille 8079d 06h /or1k/tags/rel_10
875 libgcc is moved here to avoid the mess with the folders. simons 8079d 18h /or1k/tags/rel_10

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