URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_10] - Rev 979

Rev	Log message	Author	Age	Path
979	Removed old test case binaries.	lampret	8001d 17h	/or1k/tags/rel_10
978	Added variable delay for SRAM.	lampret	8001d 17h	/or1k/tags/rel_10
977	Added store buffer.	lampret	8001d 17h	/or1k/tags/rel_10
976	Added store buffer	lampret	8001d 17h	/or1k/tags/rel_10
975	First checkin	lampret	8001d 17h	/or1k/tags/rel_10
974	Enabled what works on or1ksim and disabled other tests.	lampret	8001d 19h	/or1k/tags/rel_10
973	generated cuc top scheduler builds without syntax errors; not tested yet	markom	8003d 23h	/or1k/tags/rel_10
972	Interrupt suorces fixed.	simons	8003d 23h	/or1k/tags/rel_10
971	Now even keyboard test passes.	simons	8004d 02h	/or1k/tags/rel_10
970	Testbench is now running on ORP architecture platform.	simons	8004d 15h	/or1k/tags/rel_10
969	Checking in except directory.	lampret	8005d 06h	/or1k/tags/rel_10
968	Checking in utils directory.	lampret	8005d 06h	/or1k/tags/rel_10
967	Checking in mul directory.	lampret	8005d 06h	/or1k/tags/rel_10
966	Checking in cbasic directory.	lampret	8005d 06h	/or1k/tags/rel_10
965	Checking in basic directory.	lampret	8005d 06h	/or1k/tags/rel_10
964	Checking in support directory.	lampret	8005d 06h	/or1k/tags/rel_10
962	Fixed Xilinx trace buffer address. REported by Taylor Su.	lampret	8005d 07h	/or1k/tags/rel_10
961	uart16550 RTL files renamed/added/removed.	lampret	8005d 07h	/or1k/tags/rel_10
960	Directory cleanup.	lampret	8005d 07h	/or1k/tags/rel_10
959	Fixed size of generic flash/sram to exactly 2MB	lampret	8006d 06h	/or1k/tags/rel_10