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[/] [or1k/] [tags/] [rel_12/] - Rev 276

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Rev Log message Author Age Path
276 Moved to different folder. simons 8317d 14h /or1k/tags/rel_12
275 This are temporary files. simons 8317d 15h /or1k/tags/rel_12
274 *** empty log message *** simons 8317d 15h /or1k/tags/rel_12
273 This are temporary files. simons 8317d 15h /or1k/tags/rel_12
272 Moved to separate folder. simons 8317d 16h /or1k/tags/rel_12
271 Added missing endif lampret 8317d 18h /or1k/tags/rel_12
270 some speedups, when debug module is disabled markom 8318d 02h /or1k/tags/rel_12
269 added labels; corrected false if clause, preventing to fill iqueue markom 8318d 02h /or1k/tags/rel_12
268 First import. lampret 8318d 13h /or1k/tags/rel_12
267 First import. lampret 8318d 14h /or1k/tags/rel_12
266 First import. lampret 8318d 14h /or1k/tags/rel_12
265 Modified virtual silicon instantiations. lampret 8320d 14h /or1k/tags/rel_12
264 updated cpu config section; added sim config section markom 8320d 19h /or1k/tags/rel_12
263 configure for cpu; modified command line options markom 8320d 20h /or1k/tags/rel_12
262 small bug in build_automata fixed; configure for memory markom 8320d 21h /or1k/tags/rel_12
261 modified memory accesses; added cfg script; added pic test basic entry of vga; some extensions to mc markom 8320d 23h /or1k/tags/rel_12
260 Replaced some 8-bit memory access with 32-bit erez 8322d 13h /or1k/tags/rel_12
259 Removed tick/Makefile, which is generated anyway erez 8322d 16h /or1k/tags/rel_12
258 Added Ethernet test; renamed dma to dmatest; commented out missing pic.c erez 8322d 16h /or1k/tags/rel_12
257 Added initial Ethernet simulation (only TX as yet) erez 8322d 16h /or1k/tags/rel_12

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