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[/] [or1k/] [tags/] [rel_16/] [or1200/] [rtl/] [verilog/] [or1200_dc_tag.v] - Rev 1765

Rev	Log message	Author	Age	Path
1765		root	5620d 12h	/or1k/tags/rel_16/or1200/rtl/verilog/or1200_dc_tag.v
1212	This commit was manufactured by cvs2svn to create tag 'rel_16'.		7543d 10h	/or1k/tags/rel_16/or1200/rtl/verilog/or1200_dc_tag.v
1200	mbist signals updated according to newest convention	markom	7592d 02h	/or1k/tags/rel_16/or1200/rtl/verilog/or1200_dc_tag.v
1063	Added BIST scan. Special VS RAMs need to be used to implement BIST.	lampret	7956d 14h	/or1k/tags/rel_16/or1200/rtl/verilog/or1200_dc_tag.v
504	New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs.	lampret	8244d 02h	/or1k/tags/rel_16/or1200/rtl/verilog/or1200_dc_tag.v