URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_21/] [or1200/] [rtl/] [verilog/] [or1200_sprs.v] - Rev 596

Rev	Log message	Author	Age	Path
596	SR[TEE] should be zero after reset.	lampret	8198d 04h	/or1k/tags/rel_21/or1200/rtl/verilog/or1200_sprs.v
589	No more low/high priority interrupts (PICPR removed). Added tick timer exception. Added exception prefix (SR[EPH]). Fixed single-step bug whenreading NPC.	lampret	8199d 05h	/or1k/tags/rel_21/or1200/rtl/verilog/or1200_sprs.v
504	New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs.	lampret	8214d 05h	/or1k/tags/rel_21/or1200/rtl/verilog/or1200_sprs.v