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[/] [or1k/] [tags/] [rel_22/] [or1200/] [rtl/] [verilog/] [or1200_dmmu_tlb.v] - Rev 1163

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1163 This commit was manufactured by cvs2svn to create branch 'branch_qmem'. 7700d 13h /or1k/tags/rel_22/or1200/rtl/verilog/or1200_dmmu_tlb.v
1063 Added BIST scan. Special VS RAMs need to be used to implement BIST. lampret 7931d 20h /or1k/tags/rel_22/or1200/rtl/verilog/or1200_dmmu_tlb.v
660 Speed optimizations (removed duplicate _cyc_ and _stb_). Fixed D/IMMU cache-inhibit attr. lampret 8180d 11h /or1k/tags/rel_22/or1200/rtl/verilog/or1200_dmmu_tlb.v
617 Changed 'void' nop-ops instead of insn[0] to use insn[16]. Debug unit stalls the tick timer. Prepared new flag generation for add and and insns. Blocked DC/IC while they are turned off. Fixed I/D MMU SPRs layout except WAYs. TODO: smart IC invalidate, l.j 2 and TLB ways. lampret 8194d 15h /or1k/tags/rel_22/or1200/rtl/verilog/or1200_dmmu_tlb.v
504 New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs. lampret 8219d 08h /or1k/tags/rel_22/or1200/rtl/verilog/or1200_dmmu_tlb.v

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