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[/] [or1k/] [tags/] [rel_25/] [or1200/] [rtl/] - Rev 663

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Rev Log message Author Age Path
663 No longer using async rst as sync reset for the counter. lampret 8188d 16h /or1k/tags/rel_25/or1200/rtl
660 Speed optimizations (removed duplicate _cyc_ and _stb_). Fixed D/IMMU cache-inhibit attr. lampret 8189d 13h /or1k/tags/rel_25/or1200/rtl
636 Fixed combinational loops. lampret 8198d 22h /or1k/tags/rel_25/or1200/rtl
617 Changed 'void' nop-ops instead of insn[0] to use insn[16]. Debug unit stalls the tick timer. Prepared new flag generation for add and and insns. Blocked DC/IC while they are turned off. Fixed I/D MMU SPRs layout except WAYs. TODO: smart IC invalidate, l.j 2 and TLB ways. lampret 8203d 17h /or1k/tags/rel_25/or1200/rtl
610 Changed default reset values for SR and ESR to match or1ksim's. Fixed flop model in or1200_dpram_32x32 when OR1200_XILINX_RAM32X1D is defined. lampret 8208d 10h /or1k/tags/rel_25/or1200/rtl
597 Fixed OR1200_XILINX_RAM32X1D. lampret 8212d 04h /or1k/tags/rel_25/or1200/rtl
596 SR[TEE] should be zero after reset. lampret 8212d 09h /or1k/tags/rel_25/or1200/rtl
595 Fixed 'the NPC single-step fix'. lampret 8213d 04h /or1k/tags/rel_25/or1200/rtl
589 No more low/high priority interrupts (PICPR removed). Added tick timer exception. Added exception prefix (SR[EPH]). Fixed single-step bug whenreading NPC. lampret 8213d 10h /or1k/tags/rel_25/or1200/rtl
573 Fixed module name when compiling with OR1200_XILINX_RAM32X1D lampret 8216d 12h /or1k/tags/rel_25/or1200/rtl
571 Changed alignment exception EPCR. Not tested yet. lampret 8216d 21h /or1k/tags/rel_25/or1200/rtl
570 Fixed order of syscall and range exceptions. lampret 8216d 23h /or1k/tags/rel_25/or1200/rtl
569 Default ASIC configuration does not sample WB inputs. lampret 8217d 08h /or1k/tags/rel_25/or1200/rtl
562 Fixed mem2reg bug in FAST implementation. Updated debug unit to work with new genpc/if. lampret 8217d 12h /or1k/tags/rel_25/or1200/rtl
536 Fixed typo. OR1200_REGISTERED_OUTPUTS was not defined. Should be. lampret 8223d 17h /or1k/tags/rel_25/or1200/rtl
512 Uncommented OR1200_REGISTERED_OUTPUTS for FPGA target. lampret 8227d 21h /or1k/tags/rel_25/or1200/rtl
504 New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs. lampret 8228d 10h /or1k/tags/rel_25/or1200/rtl
402 Added OR1200_GENERIC_MULTP2_32X32 and OR1200_ASIC_MULTP2_32X32 lampret 8258d 13h /or1k/tags/rel_25/or1200/rtl
401 *** empty log message *** simons 8261d 23h /or1k/tags/rel_25/or1200/rtl
400 force_dslot_fetch does not work - allways zero. simons 8261d 23h /or1k/tags/rel_25/or1200/rtl

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